Sun managers,
Thank you very much to all those that responded.
I am very sorry for the late summary, On vacation.
The unanaimous response was "Use [none] when asked which
memory model a Sun workstation uses".
My original question
>While trying to install the lastest version of "elm"
>I was running the Configure script and it asks the following
>question.
>
>Some systems have different model sizes. On most systems they are called
>small, medium, large, and huge. On the PDP11 they are called unsplit and
>split. If your system doesn't support different memory models, say "none".
>If you wish to force everything to one memory model, say "none" here and
>put the appropriate flags later when it asks you for other cc and ld flags.
>Xenix and Venix systems may wish to put "none" and let the compiler figure
>things out.
The answer is none.
I want to thank
bidwell@andrews.edu
tgsmith@Sun.COM
blymn@awadi.com.AU
Kevin.Sheehan@uniq.com.au
jonsg@hyphen.com
guycole@netcom.com
tkevans@fallst.es.dupont.com
syd@dsinc.myxa.com
bburdick@radio.com
ted@ags.ga.erg.sri.com
grevemes@VTC.TACOM.Army.Mil
daVinci!metcalf
konczal@csmes.ncsl.nist.gov
hkatz@lehman.com
kovert@cs.UMD.EDU
Peter.Samuel@nms.otc.com.au
guy@netapp.com
I especially want to thank Timothy G Smith from Sun. Tim wrote
a very good explaination of memory models. I have included it for
those who are interested.
----- Begin Included Message -----
>From tgsmith@Sun.COM Sat Dec 24 09:28:05 1994
---------- included file ----------
>From tgsmith Thu Dec 22 23:48:03 1994
Subject: Re: Which memory model on sparc 10
< If you don't mind me asking what is a memory model
Some computers use what are called "segmented address spaces" or are
"segmented architectures". Some machines also have more than one size
pointer. Others have a single pointer size and a "flat address space".
When a computer uses a segemented address space that means that you
have to use a base register and an offset to specify and address. A
notable example is the Intel 80x86 family used in PCs. To specify an
address you use a 16 bit base register and a 16 bit offset to form a
20 bit physical address. If you only used a 16 bit offset without the
base register you could only use 64KB of memory since 2 raised to the
16th power is 64KB. The base regist specifies a "segment" of memory.
The 20 bit address is formed by shifting the segment address left 4
bits (ie multiplying it by 16) and then adding the 16 bit offset in.
Note that since the segment is shifted left 4 bits, the bottom 4 bits
are always zero so segments start on 16 byte boundaries and can
overlap. Thus the address segment 0x0000 offset 0x0010 and the
address segment 0x0001 offset 0x0000 are the same (they both address
physical address 0x10 (decimal 16). Yuck! This is ugly to think
about and is a pain to deal with when writing assembly code (or a
compiler).
The reason for all of this brain damage is that the original Intel
chips, ie the 8086, 8088, 80186, and 80286 were all 16 bit chips; ie
their registers were only 16 bits wide. They all had 20 a bit address
bus (the 80286 had 24 bit address bus). So to be able to handle more
than 64KB of data required a hack. Segmented addresses are the hack
that Intel chose.
I think the DEC PDP machines use a similar base/offset addressing
scheme as did some Goulds and also some IBM mainframes and I think the
DEC alpha does too.
Many modern chips use a flat address space. That means that only one
register is needed to form an address (there is no base register).
Machines today typically use 32 bit registers and 32 bit addresses
(although 64 bit machines are becoming more popular).
Some modern machines cheat and use 32 bit registers and pointers but
support more than 4GB of physical memory. For instance, the
sparcserver 2000 can have 5GB of memory. Cray sells an extended
version of the SS200 that can have even more memory. This works
because the system uses 32 bit virtual addresses and lets the system's
memory management unit do the work of mapping a 32 bit virtual address
to a physical address. The MMU deals with the 36 bit physical
addresses; all the CPU sees is 32 bits. (This is different than a
segmented architecture.)
Some of the newest bleeding edge machines use 64 bit registers and
thus can address more memory than anyone can afford. Heck, I doubt a
vendor could design and manufacture a machine with 2^64 bytes of
memory.
Some systems, actually some compilers, can use more than one size
pointer (typically they have 16 bit and 32 bit pointers). In the case
of an PC if you know you are just addressing something in the current
segment you only need to store the 16 bit offset. If you are going to
address something more than outside the current 64KB segment you have
to keep track of the 16 bit offset and the 16 bit segment. Using the
large pointer is more expensive in terms of time and memory so you are
better off using the small ones if you can.
The point?
If a program is known to use a small amount of memory and a computer
supports more than one pointer size then it may be beneficial to use
the small pointers as it may use less ram and may be faster.
On just about anything besides an PC this is not an issue. On a sun
this is not an issue.
----- End Included Message -----
Thanks to anyone I may have missed
Mike McDevitt
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